EP20K400GI655-2
Loadable PLD, 3.1ns, CMOS, CPGA655Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EP20K400GI655-2 is a loadable PLD from the EP20K400 series. This device features a propagation delay of 3.1 ns and operates with a nominal supply voltage of 2.5V, ranging from 2.375V to 2.625V. It is built using CMOS technology and offers 502 I/O lines, with 496 dedicated outputs and 496 inputs, alongside 4 dedicated inputs. The device is housed in a 655-terminal ceramic, metal-sealed cofired grid array package (CPGA655). Its organization includes 4 dedicated inputs and 502 I/O lines. The operating temperature range is -40°C to 100°C. This component is suitable for applications in telecommunications, data processing, and industrial automation.
Additional Information
Series: EP20K400RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 62.4840 |
| Technology | CMOS |
| Length | 62.4840 |
| Clock_Frequency_Max | 1438.00000 |
| JESD_30_Code | S-CPGA-P655 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 502 |
| Number_of_Inputs | 496 |
| Number_of_Outputs | 496 |
| Number_of_Terminals | 655 |
| Operating_Temperature_Max | 100.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 4 DEDICATED INPUTS, 502 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | IPGA |
| Package_Equivalence_Code | SPGA655,47X47 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, INTERSTITIAL PITCH |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 3.100 |
| Seated_Height_Max | 4.0800 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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