EP20K400GC655-1
Loadable PLD, 2.5ns, CMOS, CPGA655Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera's EP20K400GC655-1 is a loadable PLD from the EP20K400 series, manufactured using CMOS technology. This device features 502 I/O lines and a total of 655 terminals in a 655-pin Ceramic Pin Grid Array (CPGA) package. With a maximum clock frequency of 160 MHz and a propagation delay of 2.5 ns, it is designed for high-performance applications. The supply voltage ranges from 2.375V to 2.625V, with a nominal value of 2.5V. Its organization includes 4 dedicated inputs and 496 macrocells for output functions. This component is suitable for use in industrial and telecommunications sectors, among others. The operating temperature range is 0°C to 85°C.
Additional Information
Series: EP20K400RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 62.4840 |
| Width | 62.4840 |
| Technology | CMOS |
| Clock_Frequency_Max | 160.00000 |
| JESD_30_Code | S-CPGA-P655 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 502 |
| Number_of_Inputs | 496 |
| Number_of_Outputs | 496 |
| Number_of_Terminals | 655 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 502 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | PGA |
| Package_Equivalence_Code | SPGA655,47X47 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 2.500 |
| Seated_Height_Max | 4.0800 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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