EP20K400BI652-3
Loadable PLD, 3.6ns, CMOS, PBGA652Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EP20K400BI652-3 is a loadable PLD from the EP20K400 series, featuring a 3.6ns propagation delay and CMOS technology. This device offers 502 I/O lines and 496 dedicated outputs, organized with 4 dedicated inputs. It operates from a 2.375V to 2.625V supply voltage, with a nominal voltage of 2.5V. The component is housed in a 652-ball PBGA package (JESD-30 Code: S-PBGA-B652) with a terminal pitch of 1.270mm. Its operating temperature range is -40°C to 100°C. This PLD is suitable for applications in telecommunications, industrial control, and high-performance computing.
Additional Information
Series: EP20K400RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 45.0000 |
| Width | 45.0000 |
| Technology | CMOS |
| Clock_Frequency_Max | 833.00000 |
| JESD_30_Code | S-PBGA-B652 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 502 |
| Number_of_Inputs | 496 |
| Number_of_Outputs | 496 |
| Number_of_Terminals | 652 |
| Operating_Temperature_Max | 100.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 4 DEDICATED INPUTS, 502 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | LBGA |
| Package_Equivalence_Code | BGA652,35X35,50 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, LOW PROFILE |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 3.600 |
| Seated_Height_Max | 1.6300 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.270 |
| Terminal_Position | Bottom |
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