EP20K200FC484-3X
Loadable PLD, 3.6ns, CMOS, PBGA484Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP20K200FC484-3X is a loadable Programmable Logic Device (PLD) from the EP20K200 series. This CMOS device features 376 user I/O lines and a maximum clock frequency of 769.23 MHz, with a typical propagation delay of 3.6 ns. It operates within a supply voltage range of 2.375 V to 2.625 V and is housed in a 484-ball grid array (BGA) package, measuring 23 x 23 mm with a 1.000 mm terminal pitch. The component is designed for surface mounting, suitable for applications in telecommunications, industrial control, and computing. Its organization includes 380 input pins and 376 output lines. The operating temperature range is 0°C to 85°C.
Additional Information
Series: EP20K200RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 23.0000 |
| Width | 23.0000 |
| Technology | CMOS |
| Clock_Frequency_Max | 769.23000 |
| JESD_30_Code | S-PBGA-B484 |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 376 |
| Number_of_Inputs | 380 |
| Number_of_Outputs | 376 |
| Number_of_Terminals | 484 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 376 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 3.600 |
| Seated_Height_Max | 2.1000 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |
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