EP20K200FC484-1V
Loadable PLD, 0.3ns, CMOS, PBGA484Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP20K200 is a loadable PLD from the EP20K200 series, featuring a 0.3ns propagation delay and CMOS technology. This component, part number EP20K200FC484-1V, is housed in a 484-ball grid array (BGA) package with a terminal pitch of 1.000mm. It offers 382 I/O lines, 4 dedicated inputs, and 376 total inputs/outputs, organized into macrocells. The device operates within a temperature range of 0°C to 85°C and requires a supply voltage between 2.375V and 2.625V, with a nominal 2.5V. Its robust design makes it suitable for applications in the telecommunications, industrial automation, and computing sectors. The component is surface-mount and has a seated height of 2.1000mm.
Additional Information
Series: EP20K200RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 23.0000 |
| Technology | CMOS |
| Length | 23.0000 |
| Clock_Frequency_Max | 100.00000 |
| JESD_30_Code | S-PBGA-B484 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 382 |
| Number_of_Inputs | 376 |
| Number_of_Outputs | 376 |
| Number_of_Terminals | 484 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 382 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Equivalence_Code | BGA484,22X22,40 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 0.300 |
| Seated_Height_Max | 2.1000 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |
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