EP20K160ERC208-2
Loadable PLD, 1.93ns, CMOS, PQFP208Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EP20K160ERC208-2 is a loadable Programmable Logic Device (PLD) from the EP20K160 series. This CMOS component features 143 I/O lines and 135 dedicated inputs, supporting a maximum clock frequency of 1818 MHz with a typical propagation delay of 1.93ns. It operates within a supply voltage range of 2.375V to 2.625V and an industrial temperature range of 0°C to 85°C. The device is housed in a 208-terminal, square, fine-pitch PQFP (Plastic Quad Flat Pack) package with a terminal pitch of 0.5mm. Applications for this PLD include telecommunications, industrial control, and high-performance computing systems.
Additional Information
Series: EP20K160RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 28.0000 |
| Technology | CMOS |
| Length | 28.0000 |
| Clock_Frequency_Max | 1818.00000 |
| JESD_30_Code | S-PQFP-G208 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 143 |
| Number_of_Inputs | 135 |
| Number_of_Outputs | 135 |
| Number_of_Terminals | 208 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 143 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | HFQFP |
| Package_Equivalence_Code | QFP208,1.2SQ,20 |
| Package_Shape | Square |
| Package_Style | FLATPACK, HEAT SINK/SLUG, FINE PITCH |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 1.930 |
| Seated_Height_Max | 4.1000 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
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