EP20K100RC208-2
Loadable PLD, 3ns, CMOS, PQFP208Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP20K100RC208-2 is a loadable PLD from the EP20K100 series, featuring a 3ns propagation delay and CMOS technology. This component is housed in a 208-pin PQFP (Plastic Quad Flat Pack) package with a 0.5mm terminal pitch, offering 159 I/O lines. With a maximum clock frequency of 1000 MHz and a nominal supply voltage of 2.5V, it is designed for high-performance applications. This device finds utility in telecommunications, data processing, and industrial control systems where flexible and high-speed logic implementation is critical. Its organization includes 4 dedicated inputs and 153 general inputs, along with 153 outputs, all derived from macrocells. The operating temperature range is 0°C to 85°C.
Additional Information
Series: EP20K100RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 28.0000 |
| Width | 28.0000 |
| Technology | CMOS |
| Clock_Frequency_Max | 1000.00000 |
| JESD_30_Code | S-PQFP-G208 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 159 |
| Number_of_Inputs | 153 |
| Number_of_Outputs | 153 |
| Number_of_Terminals | 208 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 159 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | HFQFP |
| Package_Equivalence_Code | HQFP208,1.2SQ,20 |
| Package_Shape | Square |
| Package_Style | FLATPACK, HEAT SINK/SLUG, FINE PITCH |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 3.000 |
| Seated_Height_Max | 4.1000 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
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