EP20K100QI208-3
Loadable PLD, 3.6ns, CMOS, PQFP208Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP20K100QI208-3 is a loadable PLD from the EP20K100 series, packaged in a 208-pin PQFP (Package Code: FQFP) with a terminal pitch of 0.5mm. This CMOS device features a maximum clock frequency of 769 MHz and a propagation delay of 3.6ns. It offers 159 I/O lines, 4 dedicated inputs, and 153 general inputs/outputs, organized with Macrocell output functions. The component operates within a temperature range of -40°C to 100°C and requires a supply voltage between 2.375V and 2.625V, with a nominal voltage of 2.5V. Its surface-mount design and square, flatpack, fine-pitch package style make it suitable for applications in industrial control, telecommunications, and data processing systems.
Additional Information
Series: EP20K100RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 28.0000 |
| Width | 28.0000 |
| Technology | CMOS |
| Clock_Frequency_Max | 769.00000 |
| JESD_30_Code | S-PQFP-G208 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 159 |
| Number_of_Inputs | 153 |
| Number_of_Outputs | 153 |
| Number_of_Terminals | 208 |
| Operating_Temperature_Max | 100.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 4 DEDICATED INPUTS, 159 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | FQFP |
| Package_Equivalence_Code | QFP208,1.2SQ,20 |
| Package_Shape | Square |
| Package_Style | FLATPACK, FINE PITCH |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 3.600 |
| Seated_Height_Max | 4.1000 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
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