EP1810LM68-45
OT PLD, 50ns, CMOS, PQCC68Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP1810LM68-45 is an OT PLD from the EP1810 series, featuring a 50ns propagation delay and CMOS technology. This PQCC68 package component offers 48 macrocells and 12 dedicated inputs, with 48 I/O lines available. It operates within a supply voltage range of 4.5V to 5.5V and supports an extended operating temperature range from -55°C to 125°C. Designed for surface mounting, it utilizes J-bend terminals with a 1.270mm pitch. Applications for this device include industrial control, automotive systems, and telecommunications infrastructure.
Additional Information
Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 24.2316 |
| Technology | CMOS |
| Length | 24.2316 |
| Additional_Feature | 48 MACROCELLS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 22.20000 |
| JESD_30_Code | S-PQCC-J68 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 50.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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