EP1810LI68-35
OT PLD, 40ns, CMOS, PQCC68Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP1810LI68-35 is a 40ns, CMOS OT PLD packaged in a 68-pin PQCC (JESD-30 Code S-PQCC-J68). This device features 48 macrocells with shared input/clock functionality, offering 12 dedicated inputs and 48 I/O lines. The organization supports 48 outputs, with a total of 64 inputs. Operating within a supply voltage range of 4.5V to 5.5V, it boasts a maximum clock frequency of 40 MHz and a propagation delay of 40ns. Designed for surface mounting, the component has a square chip carrier package with J-bend terminals on a 1.270mm pitch. Its operating temperature spans from -40°C to 85°C. This programmable logic device is suitable for applications in industrial automation and telecommunications.
Additional Information
Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 24.2316 |
| Width | 24.2316 |
| Technology | CMOS |
| Additional_Feature | 48 MACROCELLS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 40.00000 |
| JESD_30_Code | S-PQCC-J68 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Inputs | 64 |
| Number_of_Outputs | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 40.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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