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EP1810LC68-25

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EP1810LC68-25

OT PLD, 28ns, 48-Cell, CMOS, PQCC68

Manufacturer: Altera

Categories: Programmable Logic Devices

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Altera EP1810LC68-25 is a 48-macrocell, CMOS, OT PLD featuring a 28ns propagation delay. This device offers 60 total inputs, including 12 dedicated inputs, and supports 48 I/O lines. The organization is characterized by 12 dedicated inputs and 48 I/O lines, with macrocells capable of output functions. Operating with a nominal supply voltage of 5V (4.75V to 5.25V), it functions within a temperature range of 0°C to 70°C. The EP1810 series component is housed in a 68-terminal PQCCJ (Square Chip Carrier) package with J-bend terminals, suitable for surface mounting. Applications for this Altera device can be found in telecommunications, industrial control, and consumer electronics.

Additional Information

Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Width24.2316
TechnologyCMOS
Length24.2316
Additional_Feature48 MACROCELLS; SHARED INPUT/CLOCK
Clock_Frequency_Max50.00000
In_System_ProgrammableNo
JESD_30_CodeS-PQCC-J68
JTAG_BSTNo
Number_of_Dedicated_Inputs12
Number_of_I_O_Lines48
Number_of_Inputs60
Number_of_Macro_Cells48
Number_of_Outputs48
Number_of_Terminals68
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization12 DEDICATED INPUTS, 48 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC68,1.0SQ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeOT PLD
Propagation_Delay28.000
Seated_Height_Max5.0800
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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