EP1810JI68-45
UV PLD, 50ns, CMOS, CQCC68Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP1810JI68-45 is a CMOS UV Programmable Logic Device (PLD) from the EP1810 series. This component features 48 macrocells with shared input/clock functionality, offering 12 dedicated inputs and 48 I/O lines. With a propagation delay of 50ns and a maximum clock frequency of 22.2000 MHz, it is suitable for applications requiring high-speed logic implementation. The device operates over an industrial temperature range of -40°C to +85°C and supports a supply voltage from 4.5V to 5.5V. Encased in a 68-terminal ceramic chip carrier package (CQCC68, JESD-30 Code S-CQCC-J68), this surface-mount device is designed for robust performance in demanding environments. Industries such as telecommunications, industrial automation, and consumer electronics commonly utilize PLDs of this nature.
Additional Information
Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 24.1300 |
| Technology | CMOS |
| Length | 24.1300 |
| Additional_Feature | 48 MACROCELLS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 22.20000 |
| JESD_30_Code | S-CQCC-J68 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WQCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 50.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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