EP1810JC68-45
UV PLD, 50ns, CMOS, CQCC68Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EP1810JC68-45 is a UV Programmable Logic Device (PLD) from the EP1810 series, utilizing CMOS technology. This component features 48 macrocells with shared input/clock capabilities and 12 dedicated inputs, offering a total of 48 I/O lines. The device operates with a minimum supply voltage of 4.75V and a maximum of 5.25V, with a nominal value of 5V. It boasts a maximum clock frequency of 22.2 MHz and a propagation delay of 50 ns. The EP1810JC68-45 is housed in a 68-terminal, square ceramic chip carrier with a metal-sealed cofired package style, identified by the JESD-30 code S-CQCC-J68. Its operating temperature ranges from 0°C to 70°C. This device is suitable for applications in telecommunications and industrial automation.
Additional Information
Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 24.1300 |
| Technology | CMOS |
| Length | 24.1300 |
| Additional_Feature | 48 MACROCELLS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 22.20000 |
| JESD_30_Code | S-CQCC-J68 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WQCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 50.000 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |