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Programmable Logic Devices

EP1810GM883B

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EP1810GM883B

OT PLD, 50ns, 48-Cell, CMOS, CPGA68

Manufacturer: Altera

Categories: Programmable Logic Devices

Quality Control: Learn More

Altera EP1810 series OT PLD, part number EP1810GM883B, offers 48 macrocells with a 50ns propagation delay. This CMOS device operates from a 4.5V to 5.5V supply and features 60 total inputs, including 12 dedicated inputs, and 48 I/O lines. The component is housed in a 68-terminal ceramic grid array (CPGA68) package, with a terminal pitch of 2.54mm. Screening level reference standard is 38535Q/M;38534H;883B, with an operating temperature range of -55°C to 125°C. This device finds application in demanding industrial and defense environments.

Additional Information

Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Width27.9400
TechnologyCMOS
Length27.9400
Additional_FeatureNo
In_System_ProgrammableNo
JESD_30_CodeS-XPGA-P68
JTAG_BSTNo
Number_of_Dedicated_Inputs12
Number_of_I_O_Lines48
Number_of_Inputs60
Number_of_Macro_Cells48
Number_of_Outputs48
Number_of_Terminals68
Operating_Temperature_Max125.0
Operating_Temperature_Min-55.0
Organization12 DEDICATED INPUTS, 48 I/O
Output_FunctionMACROCELL
Package_Body_MaterialCeramic
Package_CodePGA
Package_Equivalence_CodePGA68,11X11
Package_ShapeSquare
Package_StyleGRID ARRAY
Programmable_Logic_TypeOT PLD
Propagation_Delay50.000
Screening_Level_Reference_Standard38535Q/M;38534H;883B
Seated_Height_Max5.0038
Supply_Voltage_Max5.50000
Supply_Voltage_Min4.50000
Supply_Voltage_Nom5
Surface_MountNo
Terminal_FormPIN/PEG
Terminal_Pitch2.540
Terminal_PositionPerpendicular

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