EP1810GI68-25
UV PLD, 28ns, CMOS, CPGA68Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EP1810GI68-25 is a CMOS UV Programmable Logic Device (PLD) from the EP1810 series. This component features 48 macrocells with shared input/clock functionality, offering 64 total input pins and 48 I/O lines. Its organization includes 12 dedicated inputs. The propagation delay is rated at 28ns, with a maximum clock frequency of 50MHz. Operating within a temperature range of -40°C to 85°C, it requires a supply voltage between 4.5V and 5.5V. The device is housed in a 68-pin Ceramic Pin Grid Array (CPGA) package with a square shape and metal-sealed cofired construction. This component is suitable for applications in industrial and military systems requiring robust, high-performance logic solutions.
Additional Information
Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 27.9400 |
| Width | 27.9400 |
| Technology | CMOS |
| Additional_Feature | 48 MACROCELLS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 50.00000 |
| JESD_30_Code | S-CPGA-P68 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Inputs | 64 |
| Number_of_Outputs | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WPGA |
| Package_Equivalence_Code | PGA68,11X11 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 28.000 |
| Seated_Height_Max | 4.9600 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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