EP1810GC68-45
UV PLD, 50ns, CMOS, CPGA68Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP1810GC68-45 is a UV Programmable Logic Device (PLD) from the EP1810 series. This CMOS component features 48 macrocells and 12 dedicated inputs, with a total of 64 inputs and 48 I/O lines. It offers a propagation delay of 50 ns and a maximum clock frequency of 33.3 MHz. The device operates with a supply voltage range of 4.75V to 5.25V. Housed in a 68-terminal Ceramic Pin Grid Array (CPGA) package (JESD-30 Code S-CPGA-P68), it is suitable for applications requiring non-volatile, reprogrammable logic, often found in industrial and telecommunications equipment.
Additional Information
Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 27.9400 |
| Technology | CMOS |
| Length | 27.9400 |
| Additional_Feature | 48 MACROCELLS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 33.30000 |
| JESD_30_Code | S-CPGA-P68 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Inputs | 64 |
| Number_of_Outputs | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WPGA |
| Package_Equivalence_Code | PGA68,11X11 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 50.000 |
| Seated_Height_Max | 4.9600 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |