EP1810GC68-25
UV PLD, 28ns, CMOS, CPGA68Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP1810GC68-25 is a UV Programmable Logic Device from the EP1810 series. This CMOS device features 48 macrocells with shared input/clock functionality, offering a flexible organization of 12 dedicated inputs and 48 input/output lines. With a maximum clock frequency of 50 MHz, it provides a propagation delay of 28 ns. The component utilizes a 68-pin Ceramic Pin Grid Array (CPGA) package, suitable for applications requiring robust thermal and environmental performance. This device finds application in industrial automation, telecommunications, and consumer electronics where customizable logic solutions are essential. Its operating temperature range is 0°C to 70°C, with a supply voltage range of 4.75V to 5.25V.
Additional Information
Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 27.9400 |
| Width | 27.9400 |
| Technology | CMOS |
| Additional_Feature | 48 MACROCELLS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 50.00000 |
| JESD_30_Code | S-CPGA-P68 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Inputs | 64 |
| Number_of_Outputs | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WPGA |
| Package_Equivalence_Code | PGA68,11X11 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 28.000 |
| Seated_Height_Max | 4.9600 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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