EP1810GC-45
UV PLD, 50ns, 48-Cell, CMOS, CPGA68Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EP1810GC-45 is a UV Programmable Logic Device (PLD) from the EP1810 series, featuring 48 macrocells interconnected by global and/or local buses. This CMOS device offers 12 dedicated inputs and supports up to 48 I/O lines, with 4 external clock inputs. The propagation delay is 50ns, and the maximum clock frequency is 22.2 MHz. It operates with a supply voltage range of 4.75V to 5.25V and has a temperature range of 0°C to 70°C. The component is housed in a 68-pin Ceramic Pin Grid Array (CPGA) package with a JEDEC standard S-CPGA-P68 code. This device finds application in high-reliability systems within industrial and military sectors.
Additional Information
Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 27.9400 |
| Technology | CMOS |
| Length | 27.9400 |
| Additional_Feature | MACROCELLS INTERCONNECTED BY GLOBAL AND/OR LOCAL BUS; 48 MACROCELLS; 4 EXTERNAL CLOCKS |
| Clock_Frequency_Max | 22.20000 |
| In_System_Programmable | No |
| JESD_30_Code | S-CPGA-P68 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Inputs | 60 |
| Number_of_Macro_Cells | 48 |
| Number_of_Outputs | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | PGA |
| Package_Equivalence_Code | PGA68,11X11 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 50.000 |
| Seated_Height_Max | 4.9600 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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