EP1810G5962-45
UV PLD, 55ns, CMOS, CPGA68Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP1810G5962-45 is a UV Programmable Logic Device (PLD) from the EP1810 series. This CMOS device features 48 macrocells interconnected by global and local buses, supporting 4 external clocks. It offers 12 dedicated inputs and 48 I/O lines, with a propagation delay of 55ns. Operating within a temperature range of -55°C to 125°C, it requires a supply voltage between 4.5V and 5.5V, with a nominal value of 5V. The component is housed in a 68-terminal Ceramic Pin Grid Array (CPGA) package, specifically a square, metal-sealed cofired grid array with perpendicular pins. This device finds application in industrial, aerospace, and defense sectors requiring robust and reliable logic solutions.
Additional Information
Series: EP1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 27.9400 |
| Width | 27.9400 |
| Technology | CMOS |
| Additional_Feature | MACROCELLS INTERCONNECTED BY GLOBAL AND/OR LOCAL BUS; 48 MACROCELLS; 4 EXTERNAL CLOCKS |
| Clock_Frequency_Max | 22.20000 |
| JESD_30_Code | S-CPGA-P68 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WPGA |
| Package_Equivalence_Code | PGA68,11X11 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, WINDOW |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 55.000 |
| Seated_Height_Max | 3.8100 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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