EP1800GM
UV PLD, 90ns, 48-Cell, CMOS, CPGA68Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EP1800GM, an ultraviolet (UV) erasable programmable logic device (PLD) from the EP1800 series, offers a CMOS implementation with 48 macrocells and a propagation delay of 90ns. This component features 60 total inputs, including 12 dedicated inputs, and 48 I/O lines. It operates within a supply voltage range of 4.5V to 5.5V, with a nominal value of 5V, and supports a maximum clock frequency of 16.1000 MHz. The EP1800GM is housed in a 68-pin ceramic pin grid array (CPGA) package, measuring 27.94mm square with a terminal pitch of 2.54mm. Its operating temperature range spans from -55°C to 125°C. This device finds application in industrial, telecommunications, and defense sectors requiring high-reliability logic solutions.
Additional Information
Series: EP1800RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 27.9400 |
| Width | 27.9400 |
| Technology | CMOS |
| Additional_Feature | No |
| Clock_Frequency_Max | 16.10000 |
| In_System_Programmable | No |
| JESD_30_Code | S-XPGA-P68 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Inputs | 60 |
| Number_of_Macro_Cells | 48 |
| Number_of_Outputs | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | Ceramic |
| Package_Code | PGA |
| Package_Equivalence_Code | PGA68,11X11 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 90.000 |
| Seated_Height_Max | 5.0038 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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