EP1210PC-1
OT PLD, 50ns, CMOS, PDIP40Manufacturer: Altera
Categories: Programmable Logic Devices
Quality Control: Learn More
The Altera EP1210PC-1 is an OT PLD featuring 28 macrocells within a 40-pin DIP package (R-PDIP-T40). This CMOS device offers 12 dedicated inputs and 24 I/O lines, operating with a supply voltage range of 4.75V to 5.25V nominal 5V. It boasts a maximum clock frequency of 28.5 MHz and a propagation delay of 50 ns. Designed for through-hole mounting, the EP1210PC-1 finds application in various industrial and commercial electronic systems requiring flexible logic implementation. Its organization provides 12 dedicated inputs and 24 I/O lines, with macrocells for output functions. The component is housed in a plastic/epoxy rectangular package with dual in-line terminals.
Additional Information
Series: EP1210RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 15.2400 |
| Technology | CMOS |
| Length | 52.3240 |
| Additional_Feature | 28 MACROCELLS |
| Clock_Frequency_Max | 28.50000 |
| JESD_30_Code | R-PDIP-T40 |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 24 |
| Number_of_Terminals | 40 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 12 DEDICATED INPUTS, 24 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP40,.6 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 50.000 |
| Seated_Height_Max | 4.8300 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
Request a Quote
Clients Also Buy
EP1210JM883B
Programmable Logic Device, PAL-Type, CMOS, CQCC44
EP1210LC-1
OT PLD, 50ns, CMOS, PQCC44
EP1210DM-2
UV PLD, 65ns, CMOS, CDIP40