5962-9324702MXC
EE PLD, 15ns, CMOS, CPGA192Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera's 5962-9324702MXC is an EE PLD featuring 256 macrocells with a worst-case propagation delay of 15ns. This CMOS device supports configurable I/O operation at 3.3V or 5V and incorporates two external clocks with shared input/clock functionality. Designed for demanding applications, the component operates across a wide temperature range from -55°C to +125°C. It is housed in a 192-pin ceramic metal-sealed cofired grid array (CPGA192) package, adhering to MIL-STD-883 screening levels. Key applications include defense, aerospace, and high-reliability industrial systems. The device operates from a 2.5V nominal supply voltage.
Additional Information
Series: 5962-9324702RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 45.1500 |
| Technology | CMOS |
| Length | 45.1500 |
| Additional_Feature | 256 MACROCELLS; CONFIGURABLE I/O OPERATION (3.3V OR 5V); 2 EXTERNAL CLOCKS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 76.90000 |
| JESD_30_Code | S-CPGA-P192 |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_Terminals | 192 |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Organization | 0 DEDICATED INPUTS |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | PGA |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 15.000 |
| Screening_Level_Reference_Standard | MIL-STD-883 |
| Seated_Height_Max | 5.4300 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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