AM9151-50/DMC
Standard SRAM, 1KX4, 50ns, MOS, CDIP24Manufacturer: Advanced Micro Devices
Categories: SRAMs
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Advanced Micro Devices AM9151 series SRAM, part number AM9151-50-DMC, offers a 4096 bit memory density organized as 1K x 4 bits. This asynchronous, standard SRAM utilizes MOS technology and features 50ns maximum access time. The component is housed in a 24-lead Ceramic Dual In-line Package (CDIP) with through-hole termination and a terminal pitch of 2.54mm. Operating across a temperature range of -55°C to +125°C, this device is designed for applications requiring robust performance and reliability, including aerospace and defense systems, industrial control, and high-reliability computing. The output characteristics are 3-state, with common I/O. This component meets MIL-STD-883 Class B (Modified) screening standards.
Additional Information
Series: AM9151RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | MOS |
| Access_Time_Max | 50.0000000000000000 |
| I_O_Type | COMMON |
| JESD_30_Code | R-XDIP-T24 |
| Memory_Density | 4096.0000000000000000 |
| Memory_IC_Type | STANDARD SRAM |
| Memory_Organization | 1KX4 |
| Memory_Width | 4 |
| Number_of_Terminals | 24 |
| Number_of_Words | 1024.0000000000000000 |
| Number_of_Words_Code | 1k |
| Operating_Mode | Asynchronous |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Output_Characteristics | 3-State |
| Package_Body_Material | Ceramic |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP24,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Parallel_Serial | Parallel |
| Screening_Level_Reference_Standard | MIL-STD-883 Class B (Modified) |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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