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MACH120-18JI

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MACH120-18JI

EE PLD, 18ns, 48-Cell, CMOS, PQCC68

Manufacturer: Advanced Micro Devices

Categories: Programmable Logic Devices

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The Advanced Micro Devices MACH120-18JI is an Electrically Erasable Programmable Logic Device from the MACH120 series, featuring an 18ns propagation delay and 48 macrocells within a CMOS technology. This component is organized with 4 dedicated inputs and 48 I/O lines, utilizing 4 PAL blocks interconnected by a Programmable Interconnect Array (PIA). It supports 4 external clocks and shared input/clock functionality. The device operates within a supply voltage range of 4.5V to 5.5V and is housed in a 68-terminal PQCC package (JESD-30 Code S-PQCC-J68). Its surface-mount design with J-bend terminals is suitable for applications in telecommunications, industrial control, and consumer electronics. The operating temperature range is -40°C to 85°C.

Additional Information

Series: MACH120RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length24.2062
Width24.2062
TechnologyCMOS
Additional_FeaturePAL BLOCKS INTERCONNECTED BY PIA; 4 PAL BLOCKS; 4 EXTERNAL CLOCKS; SHARED INPUT/CLOCK
Clock_Frequency_Max38.00000
In_System_ProgrammableNo
JESD_30_CodeS-PQCC-J68
JTAG_BSTNo
Number_of_Dedicated_Inputs4
Number_of_I_O_Lines48
Number_of_Macro_Cells48
Number_of_Terminals68
Operating_Temperature_Max85.0
Operating_Temperature_Min-40.0
Organization4 DEDICATED INPUTS, 48 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC68,1.0SQ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeEE PLD
Propagation_Delay18.000
Seated_Height_Max4.5700
Supply_Voltage_Max5.50000
Supply_Voltage_Min4.50000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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