5962-9228401MZC
RISC Microprocessor, 32-Bit, 20MHz, CMOS, CPGA169Manufacturer: Advanced Micro Devices
Categories: Microprocessors
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Advanced Micro Devices, 5962-9228401, a 32-bit RISC microprocessor, operates at a 20MHz clock speed. This CMOS component features a 32-bit address bus and a 32-bit external data bus. It is housed in a 169-pin Ceramic Pin Grid Array (CPGA) package (JESD-30 Code: S-CPGA-P169) with a terminal pitch of 2.54mm. The operating temperature range is -55°C to +125°C, with a nominal supply voltage of 5.0V. This device is suitable for demanding applications within the aerospace and defense industries, adhering to MIL-STD-883 screening levels. Its robust construction and wide operating temperature make it ideal for harsh environments.
Additional Information
Series: 5962-9228401RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Format | Floating Point |
| Length | 44.4500 |
| Speed | 20.00000000 |
| Width | 44.4500 |
| Technology | CMOS |
| Address_Bus_Width | 32 |
| Bit_Size | 32 |
| Boundary_Scan | No |
| Clock_Frequency_Max | 40.0000000000000000 |
| External_Data_Bus_Width | 32 |
| Integrated_Cache | No |
| JESD_30_Code | S-CPGA-P169 |
| Low_Power_Mode | No |
| Number_of_DMA_Channels | 0 |
| Number_of_External_Interrupts | 6 |
| Number_of_Serial_I_Os | 0 |
| Number_of_Terminals | 169 |
| On_Chip_Data_RAM_Width | 0 |
| Operating_Temperature_Max | 125.0000 |
| Operating_Temperature_Min | -55.0000 |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | PGA |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| RAM_words | 0 |
| Screening_Level_Reference_Standard | MIL-STD-883 |
| Seated_Height_Max | 4.9530 |
| Supply_Current_Max | 500.00000000 |
| Supply_Voltage_Max | 5.5000 |
| Supply_Voltage_Min | 4.5000 |
| Supply_Voltage_Nom | 5.0000 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
| uPs_uCs_Peripheral_ICs_Type | MICROPROCESSOR, RISC |
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